In recent years, as a storage device used in electronic devices such as personal computers (PCs), solid-state drives (SSDs) have attracted attention that include a flash memory, flash electrically erasable programmable read-only memory (EEPROM), which is a nonvolatile memory. Incidentally, an electronic device performs data access using a logical address, while a storage device performs data access using a physical address. Accordingly, the storage device stores an address translation table (also referred to as “forward lookup table”) to convert a logical address to a physical address in the system area of the flash memory or the like. When an electronic device accesses data in the storage device, the storage device refers to the address translation table, and accesses a physical address corresponding to a logical address specified by the electronic device.
In the memory device (hereinafter, “memory”) of the storage device and the like such as a dynamic random access memory (DRAM) and a flash memory, it may sometimes happen that a stored bit is inverted due to static electricity, resulting in a bit error. If a bit error occurs in entry data of the address translation table, proper data access is not available. For this reason, entry data in the address translation table is assigned an error detecting code (EDC) for detecting a bit error and an error correcting code or an error control code (ECC) for correcting a bit error if any.
The memory of the storage device has an increasingly larger capacity, and a bit error is less and less likely to occur. As the memory capacity increases, entries increase in the address translation table. The error correcting code is larger in data size than the error detecting code, and its data amount is non-negligible. Although the occurrence rate of bit error is decreasing from year to year, there has been no other way than to use the error correcting code assigned to entry data in the address translation table to correct a bit error that occurs infrequently in the entry data.